1. Technical Field
An embodiment of the invention relates generally to integrated circuit fabrication, and in particular relates to photoresist material processing.
2. Description of the Related Art
During the manufacture of integrated circuits on a wafer, a common processing operation is to etch a layer of the wafer into a predetermined pattern. The etch pattern is produced by coating the target layer (the layer to be etched) with photoresist material, exposing the photoresist material to light in the predetermined pattern, and then using a development process to remove only the exposed portions of photoresist in a positive tone process (or alternately, to remove only the unexposed portions of photoresist in a negative tone process). The remaining photoresist material then acts as a mask for a subsequent etching process. Because the photoresist material is relatively resistant to the etch process, the portions of the target layer not covered by photoresist are etched away, while the portions of the target layer covered by the photoresist are preserved. The remaining photoresist is then removed, leaving the target layer etched in the predetermined pattern.
When photoresist material absorbs the exposure light, the bottom portion of the photoresist layer receives less light and is less affected by the exposure than the upper portion. The bottom portion is therefore more likely to resist removal during the development process. This depth-related exposure gradient, combined with edge effects along the exposed/non-exposed transition areas and/or enhanced solubility of the photoresist material at the top of the resist feature, produces sloped edges on the photoresist material. The sloped edges in turn effect the accuracy of the subsequent etch process, making the profile of the etched features difficult to fabricate as square (e.g., 90 degree side-wall angle) and hard to accurately control. Although this may not be as much of a problem for large features, the edge uncertainty and non-square profiles can make very small features (e.g., transistor gates) unusable and thus places a limit on how small the features in the integrated circuit can be. This is especially a problem with photoresist materials performing at the limits of resolution of deep ultraviolet, vacuum ultraviolet and extreme ultraviolet exposure light or e-beam, which is necessary for very small feature sizes. Similar effects have been noted for other techniques for direct writing of features such as the Atomic Force Microscope technique (AFM).